Internet-Draft SR Algorithm in PCEP September 2023
Sidor, et al. Expires 23 March 2024 [Page]
Workgroup:
PCE Working Group
Internet-Draft:
draft-ietf-pce-sid-algo-05
Published:
Intended Status:
Standards Track
Expires:
Authors:
S. Sidor
Cisco Systems, Inc.
A. Tokar
Cisco Systems, Inc.
S. Peng
ZTE Corporation
S. Peng
Huawei Technologies
A. Stone
Nokia

Carrying SR Algorithm information in PCE-based Networks.

Abstract

The Algorithm associated with a prefix Segment-ID (SID) defines the path computation Algorithm used by Interior Gateway Protocols (IGPs). This information is available to controllers such as the Path Computation Element (PCE) via topology learning. This document proposes an approach for informing headend routers regarding the Algorithm associated with each prefix SID used in PCE-computed paths, as well as signalling a specific SR algorithm as a constraint to the PCE.

Requirements Language

The key words "MUST", "MUST NOT", "REQUIRED", "SHALL", "SHALL NOT", "SHOULD", "SHOULD NOT", "RECOMMENDED", "NOT RECOMMENDED", "MAY", and "OPTIONAL" in this document are to be interpreted as described in BCP 14 [RFC2119] [RFC8174] when, and only when, they appear in all capitals, as shown here.

Status of This Memo

This Internet-Draft is submitted in full conformance with the provisions of BCP 78 and BCP 79.

Internet-Drafts are working documents of the Internet Engineering Task Force (IETF). Note that other groups may also distribute working documents as Internet-Drafts. The list of current Internet-Drafts is at https://datatracker.ietf.org/drafts/current/.

Internet-Drafts are draft documents valid for a maximum of six months and may be updated, replaced, or obsoleted by other documents at any time. It is inappropriate to use Internet-Drafts as reference material or to cite them other than as "work in progress."

This Internet-Draft will expire on 23 March 2024.

Table of Contents

1. Introduction

A PCE can compute SR-TE paths using SIDs with different Algorithms depending on the use-case, constraints, etc. While this information is available on the PCE, there is no method of conveying this information to the headend router.

Similarly, the headend can also compute SR-TE paths using different Algorithms, and this information also needs to be conveyed to the PCE for collection or troubleshooting purposes. In addition, in the case of multiple (redundant) PCEs, when the headend receives a path from the primary PCE, it needs to be able to report the complete path information - including the Algorithm - to the backup PCE so that in HA scenarios, the backup PCE can verify the prefix SIDs appropriately.

An operator may also want to constrain the path computed by the PCE to a specific SR Algorithm, for example, in order to only use SR Algorithms for a low-latency path. A new TLV is introduced for this purpose.

Refer to [RFC8665] and [RFC8667] for details about the prefix SR Algorithm.

This document is extending:

A new TLV for signalling SR Algorithm constraint to the PCE is also introduced, to be carried inside the LSPA object, which is defined in [RFC5440].

The mechanisms described in this document are equally applicable to both SR-MPLS and SRv6.

2. Terminology

The following terminologies are used in this document:

ASLA:
Application-Specific Link Attribute.
BSID:
Binding Segment Identifier.
ERO:
Explicit Route Object.
FAD:
Flexible Algorithm Definition.
IGP:
Interior Gateway Protocol.
NAI:
Node or Adjacency Identifier.
P2P:
Point-to-Point.
P2MP:
Point-to-Multipoint.
PCE:
Path Computation Element.
PCEP:
Path Computation Element Protocol.
SID:
Segment Identifier.
SR:
Segment Routing.
SR-TE:
Segment Routing Traffic Engineering.
LSP:
Label Switched Path.
LSPA:
Label Switched Path Attributes.
Winning FAD:
The FAD selected according to rules described in Section 5.3 of [RFC9350].

3. Object Formats

3.1. OPEN Object

3.1.1. SR PCE Capability Sub-TLV

A new flag S is proposed in the SR PCE Capability Sub-TLV introduced in Section 4.1.2 of [RFC8664] to indicate support for SR Algorithm. If S flag is set, PCEP peer indicates support for Algorithm field in SR-ERO Subject and SR Algorithm constraint only for Traffic-engineering paths with Segment Routing Path Setup Type. It is not indicating support for these extensions for other Path Setup Types.

 0                   1                   2                   3
 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
|         Type=26               |            Length=4           |
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
|         Reserved              |   Flags |S|N|X|      MSD      |
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+

3.1.2. SRv6 PCE Capability sub-TLV

A new flag S is proposed in the SRv6 PCE Capability sub-TLV introduced in 4.1.1 of [I-D.ietf-pce-segment-routing-ipv6] to indicate support for SR Algorithm. If S flag is set, PCEP peer indicates support for Algorithm field in SRv6-ERO Subobject and SR Algorithm constraint only for Traffic-engineering paths with SRv6 Path Setup Type. It is not indicating support for these extensions for other Path Setup Types.

 0                   1                   2                   3
 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
|            Type=27            |            Length             |
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
|            Reserved           |             Flags       |S|N|X|
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
|   MSD-Type    | MSD-Value     |   MSD-Type    |   MSD-Value   |
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
//                             ...                             //
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
|   MSD-Type    | MSD-Value     |            Padding            |
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+

3.2. SR-ERO Subobject

The SR-ERO subobject encoding is extended with new flag "A" to indicate if the Algorithm field is included after other optional fields.

   0                   1                   2                   3
   0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  |L|   Type=36   |     Length    |  NT   |     Flags   |A|F|S|C|M|
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  |                         SID (optional)                        |
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  //                   NAI (variable, optional)                  //
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  |                  Reserved                     |  Algorithm    |
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+

3.3. SRv6-ERO Subobject

The SRv6-ERO subobject encoding is extended with new flag "A" to indicate if the Algorithm field is included after other optional fields.

   0                   1                   2                   3
   0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  |L|  Type=40    |     Length    |   NT  |    Flags    |A|V|T|F|S|
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  |            Reserved           |        Endpoint Behavior      |
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  |                                                               |
  |                      SRv6 SID (optional)                      |
  |                           (128-bit)                           |
  |                                                               |
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  //                    NAI (variable, optional)                 //
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  |                     SID Structure (optional)                  |
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  |                  Reserved                     |  Algorithm    |
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+

3.4. LSPA Object

A new TLV for the LSPA Object with TLV type=66 is introduced to carry the SR Algorithm constraint. This TLV SHOULD only be used when PST (Path Setup type) = SR or SRv6. Only the first instance of this TLV SHOULD be processed, subsequent instances SHOULD be ignored

The format of the SR Algorithm TLV is as follows:

   0                   1                   2                   3
   0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  |         Type=66               |            Length=4           |
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  |         Reserved              |   Flags   |F|S|   Algorithm   |
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
Figure 1: SR Algorithm TLV Format

The code point for the TLV type is 66. The TLV length is 4 octets.

The 32-bit value is formatted as follows.

Reserved:
MUST be set to zero by the sender and MUST be ignored by the receiver.
Flags:

This document defines the following flag bits. The other bits MUST be set to zero by the sender and MUST be ignored by the receiver.

  • S (Strict): If set, the PCE MUST fail the path computation if specified SR algorithm constraint cannot be satisfied. If unset, the PCE MAY ignore specified algorithm constraint.
  • F (Flexible Algorithm Path Computation): If set, the PCE follows procedures defined in Section 4.2.1. If unset, the PCE follows procedures defined in Section 4.2.2. The flag SHOULD be ignored if Algorithm field is set to value in range 0 to 127.
Algorithm:
SR Algorithm the PCE MUST take into acount while computing a path for the LSP.

3.5. Extensions to METRIC Object

The METRIC object is defined in Section 7.8 of [RFC5440] This document defines the following types for the METRIC object.

  • T:22: Path Min Delay metric (Section 3.5.1)
  • T:23: P2MP Path Min Delay metric (Section 3.5.2)

3.5.1. Path Min Delay Metric

[RFC7471] and [RFC8570] defined as "Min Unidirectional Link Delay". The Min Link Delay metric represents measured minimum link delay value over a configurable interval.

The Path Min Delay metric type of the METRIC object in PCEP represents the sum of the Min Link Delay metric of all links along a P2P path.

  • A Min Link Delay metric of link L is denoted D(L).
  • A path P of a P2P LSP is a list of K links {Lpi,(i=1...K)}.
  • A Path Min Delay metric for the P2P path P = Sum {D(Lpi), (i=1...K)}.

3.5.2. P2MP Path Min Delay Metric

The P2MP Path Min Delay metric type of the METRIC object in PCEP encodes the Path Min Delay metric for the destination that observes the worst delay metric among all destinations of the P2MP tree.

  • A P2MP tree T comprises a set of M destinations {Dest_j, (j=1...M)}.
  • The P2P Path Min Delay metric of the path to destination Dest_j is denoted by PMDM(Dest_j).
  • The P2MP Path Min Delay metric for the P2MP tree T = Maximum{PMDM(Dest_j), (j=1...M)}.

3.5.3. Path Min Delay Metric value

[RFC7471] and [RFC8570] define "Min/Max Unidirectional Link Delay Sub-TLV" to advertise the link minimum and maximum delay in microseconds in a 24-bit field.

[RFC5440] defines the METRIC object with a 32-bit metric value encoded in IEEE floating point format.

The encoding for the Path Min Delay metric value is quantified in units of microseconds and encoded in IEEE floating point format.

The conversion from 24-bit integer to 32-bit IEEE floating point could introduce some loss of precision.

4. Operation

The PCEP protocol extensions defined in Sections 3.2, 3.3 and 3.4 of this draft MUST NOT be used if one or both PCEP speakers have not indicated the support using S flag in Path Setup Type specific Sub-TLVs in their respective OPEN messages.

4.1. SR-ERO and SRv6-ERO Encoding

PCEP speaker MAY set the A flag and include the Algorithm field in SR-ERO or SRv6-ERO subobject if the S flag was advertised by both PCEP speakers.

If PCEP peer receives SR-ERO subobject with the A flag set or with the SR Algorithm included, but the S flag was not advertised, then it MUST consider entire ERO as invalid as described in Section 5.2.1 of [RFC8664]

The Algorithm field MUST be included after optional SID, NAI or SID structure and length of SR-ERO or SRv6-ERO subobject MUST be increased with additional 4 bytes for Reserved and Algorithm field.

If the length and the A flag are not consistent, it MUST consider the entire ERO invalid and MUST send a PCErr message with Error-Type = 10 ("Reception of an invalid object") and Error-value = 11 ("Malformed object").

4.2. SR Algorithm Constraint

In order to signal a specific SR Algorithm constraint to the PCE, the headend MUST encode the SR ALGORITHM TLV inside the LSPA object.

If PCEP peer receives LSPA object with SR ALGORITHM TLV in it, but the S flag was not advertised, then PCEP peer MUST ignore it as per Section 7.1 of [RFC5440].

Path computation MUST occur on the topology associated with specified SR algorithm. The PCE MUST NOT use Prefix SIDs of SR Algorithm other than specified in algorithm constraint. It is allowed to use other SID types (e.g., Adjacency or Binding SID), but only from nodes participating in specified SR algorithm.

Specified Algorithm constraint is applied to end-to-end SR policy path. Using different Algorithm constraint in each domain or part of the topology in single path computation is out of scope of this document. One possible solution is to determine FAD mapping using PCE local policy.

If the PCE is unable to find a path with the given SR Algorithm constraint or it does not support combination of specified constraints, it MAY respond with empty path to indicate that it was not able to find valid path.

If headend is part of multiple IGP domains and winning FAD for specified SR Algorithm in each of them has different constraints, the PCE implementation MAY have local policy with defined behavior for selecting FAD for such path-computation or even completely not supporting it. It is RECOMMENDED to respond with empty path if such path-computation is not supported.

SR Algorithm does not replace the Objective Function defined in [RFC5541]

4.2.1. Flexible Algorithm Path computation

The PCE MUST follow IGP Flexible Algorithm path computation logic as described in [RFC9350]. That includes using same ordered rules to select FAD if multiple FADs are available, considering node participation of specified SR algorithm in the path computation, using ASLA specific link attributes and other rules for Flexible Algorithm path computation described in that document.

The PCE MUST optimize computed path based on metric type specified in the FAD, metric type included in PCEP messages from PCC MUST be ignored. The PCE SHOULD use metric type from FAD in messages sent to the PCC. If corresponding metric type is not defined in PCEP, PCE SHOULD skip encoding of metric object for optimization metric.

There are corresponding metric types in PCEP for IGP and TE metric from FAD introduced in [RFC9350], but there was no corresponding metric type defined for "Min Unidirectional Link Delay". Section 3.5 of this document is introducing it.

The PCE MUST use constraints specified in the FAD and also constraints directly included in PCEP messages from PCC. The PCE implementation MAY decide to ignore specific constraints received from PCC based on existing processing rules for PCEP Objects and TLVs, e.g. P flag described in Section 7.2 of [RFC5440] and processing rules described in [I-D.ietf-pce-stateful-pce-optional]. If the PCE does not support specified combination of constraints, it MAY respond with PCEP message with empty ERO. PCC MUST NOT include constraints from FAD in PCEP message sent to PCE as it can result in undesired behavior in various cases. PCE SHOULD NOT include constraints from FAD in PCEP messages sent to PCC.

4.2.2. Path computation with SID filtering

The SR Algorithm constraint acts as a filter, restricting which SIDs may be used as a result of the path computation function. Path computation is done based on optimization metric type and constraints specified in PCEP message received from PCC.

If specified SR Algorithm is Flexible Algorithm, the PCE MUST ensure that IGP path of Flex-algo SIDs is congruant with computed path.

4.2.3. New Metric types

All the rules of processing the METRIC object as explained in [RFC5440] and [RFC8233] are applicable to new metric types defined in this document.

5. Planned enhancements

List of remaining items tracked for future draft versions, which requires more discussion.

Error reporting:
More granular indication of reason for failed path computation, e.g. in case of unsupported combination of constraints.

6. Security Considerations

No additional security measure is required.

7. IANA Considerations

7.1. SR Capability Flag

IANA maintains a sub-registry, named "SR Capability Flag Field", within the "Path Computation Element Protocol (PCEP) Numbers" registry to manage the Flags field of the SR-PCE-CAPABILITY TLV. IANA is requested to make the following assignment:

Table 1
Bit Description Reference
 
5 SR Algorithm Capability This document

7.2. SRv6 PCE Capability Flag

IANA was requested in [I-D.ietf-pce-segment-routing-ipv6] to create a sub-registry, named "SRv6 PCE Capability Flags", within the "Path Computation Element Protocol (PCEP) Numbers" registry to manage the Flags field of SRv6-PCE-CAPABILITY sub-TLV. IANA is requested to make the following assignment:

Table 2
Bit Description Reference
 
TBD1 SR Algorithm Capability This document

7.3. SR-ERO Flag

IANA maintains a sub-registry, named "SR-ERO Flag Field", within the "Path Computation Element Protocol (PCEP) Numbers" registry to manage the Flags field of the SR-ERO Subobject. IANA is requested to make the following assignment:

Table 3
Bit Description Reference
 
7 SR Algorithm Flag This document

7.4. SRv6-ERO Flag

IANA was requested in [I-D.ietf-pce-segment-routing-ipv6], named "SRv6-ERO Flag Field", within the "Path Computation Element Protocol (PCEP) Numbers" registry to manage the Flags field of the SRv6-ERO subobject. IANA is requested to make the following assignment:

Table 4
Bit Description Reference
 
TBD2 SR Algorithm Flag This document

7.5. PCEP TLV Types

IANA maintains a subregistry, named "PCEP TLV Type Indicators", within the "Path Computation Element Protocol (PCEP) Numbers" registry. IANA is requested to allocate a new TLV type for the new LSPA TLV specified in this document.

Table 5
Type Description Reference
 
66 SR algorithm This document

7.6. Metric Types

IANA maintains a subregistry for "METRIC Object T Field" within the "Path Computation Element Protocol (PCEP) Numbers" registry. IANA is requested to allocate a new values for metric types defined in this document:

Table 6
Type Description Reference
 
22 Path Min Delay Metric This document
23 P2MP Path Min Delay Metric This document

8. Normative References

[I-D.ietf-pce-segment-routing-ipv6]
Li, C., Kaladharan, P., Sivabalan, S., Koldychev, M., and Y. Zhu, "Path Computation Element Communication Protocol (PCEP) Extensions for Segment Routing leveraging the IPv6 dataplane", Work in Progress, Internet-Draft, draft-ietf-pce-segment-routing-ipv6-20, , <https://datatracker.ietf.org/doc/html/draft-ietf-pce-segment-routing-ipv6-20>.
[I-D.ietf-pce-stateful-pce-optional]
Li, C., Zheng, H., and S. Litkowski, "Extension for Stateful PCE to allow Optional Processing of PCE Communication Protocol (PCEP) Objects", Work in Progress, Internet-Draft, draft-ietf-pce-stateful-pce-optional-06, , <https://datatracker.ietf.org/doc/html/draft-ietf-pce-stateful-pce-optional-06>.
[RFC2119]
Bradner, S., "Key words for use in RFCs to Indicate Requirement Levels", BCP 14, RFC 2119, DOI 10.17487/RFC2119, , <https://www.rfc-editor.org/info/rfc2119>.
[RFC5440]
Vasseur, JP., Ed. and JL. Le Roux, Ed., "Path Computation Element (PCE) Communication Protocol (PCEP)", RFC 5440, DOI 10.17487/RFC5440, , <https://www.rfc-editor.org/info/rfc5440>.
[RFC5541]
Le Roux, JL., Vasseur, JP., and Y. Lee, "Encoding of Objective Functions in the Path Computation Element Communication Protocol (PCEP)", RFC 5541, DOI 10.17487/RFC5541, , <https://www.rfc-editor.org/info/rfc5541>.
[RFC7471]
Giacalone, S., Ward, D., Drake, J., Atlas, A., and S. Previdi, "OSPF Traffic Engineering (TE) Metric Extensions", RFC 7471, DOI 10.17487/RFC7471, , <https://www.rfc-editor.org/info/rfc7471>.
[RFC8174]
Leiba, B., "Ambiguity of Uppercase vs Lowercase in RFC 2119 Key Words", BCP 14, RFC 8174, DOI 10.17487/RFC8174, , <https://www.rfc-editor.org/info/rfc8174>.
[RFC8233]
Dhody, D., Wu, Q., Manral, V., Ali, Z., and K. Kumaki, "Extensions to the Path Computation Element Communication Protocol (PCEP) to Compute Service-Aware Label Switched Paths (LSPs)", RFC 8233, DOI 10.17487/RFC8233, , <https://www.rfc-editor.org/info/rfc8233>.
[RFC8570]
Ginsberg, L., Ed., Previdi, S., Ed., Giacalone, S., Ward, D., Drake, J., and Q. Wu, "IS-IS Traffic Engineering (TE) Metric Extensions", RFC 8570, DOI 10.17487/RFC8570, , <https://www.rfc-editor.org/info/rfc8570>.
[RFC8664]
Sivabalan, S., Filsfils, C., Tantsura, J., Henderickx, W., and J. Hardwick, "Path Computation Element Communication Protocol (PCEP) Extensions for Segment Routing", RFC 8664, DOI 10.17487/RFC8664, , <https://www.rfc-editor.org/info/rfc8664>.
[RFC8665]
Psenak, P., Ed., Previdi, S., Ed., Filsfils, C., Gredler, H., Shakir, R., Henderickx, W., and J. Tantsura, "OSPF Extensions for Segment Routing", RFC 8665, DOI 10.17487/RFC8665, , <https://www.rfc-editor.org/info/rfc8665>.
[RFC8667]
Previdi, S., Ed., Ginsberg, L., Ed., Filsfils, C., Bashandy, A., Gredler, H., and B. Decraene, "IS-IS Extensions for Segment Routing", RFC 8667, DOI 10.17487/RFC8667, , <https://www.rfc-editor.org/info/rfc8667>.
[RFC9350]
Psenak, P., Ed., Hegde, S., Filsfils, C., Talaulikar, K., and A. Gulko, "IGP Flexible Algorithm", RFC 9350, DOI 10.17487/RFC9350, , <https://www.rfc-editor.org/info/rfc9350>.

Appendix A. Contributors

Mike Koldychev
Cisco Systems, Inc.
Email: mkoldych@cisco.com

Zafar Ali
Cisco Systems, Inc.
Email: zali@cisco.com

Stephane Litkowski
Cisco Systems, Inc.
Email: slitkows.ietf@gmail.com

Siva Sivabalan
Ciena
Email: msiva282@gmail.com

Tarek Saad
Cisco Systems, Inc.
Email: tsaad.net@gmail.com

Mahendra Singh Negi
RtBrick Inc
Email: mahend.ietf@gmail.com

Authors' Addresses

Samuel Sidor
Cisco Systems, Inc.
Eurovea Central 3.
Pribinova 10
811 09 Bratislava
Slovakia
Alex Tokar
Cisco Systems, Inc.
2300 East President George
Richardson, TX 75082
United States of America
Shaofu Peng
ZTE Corporation
No.50 Software Avenue
Nanjing
Jiangsu, 210012
China
Shuping Peng
Huawei Technologies
Huawei Campus, No. 156 Beiqing Rd.
Beijing
100095
China
Andrew Stone
Nokia